The growing complexity of space systems is creating the need for high speed networking technologies to interconnect the different elements of a spacecraft. This interest has spurred initiatives by both ESA and NASA to define the next generation networking technologies for Space. In both cases, Ethernet has been the preferred choice due to its wide adoption in terrestrial applications and because it is fully specified in standards to ensure interoperability.
The requirements for integrated circuits that have to operate in space are very different from those that are used in terrestrial applications. In particular, the radiation is much more intense and causes several types of effects on the devices that compromise their reliability. Therefore, special “rad-hard” design and manufacturing techniques are needed for devices that will operate in space. This means that to implement Ethernet in space systems, rad-hard Ethernet components have to be designed.
The goal of this project is to design and manufacture rad-hard Ethernet PHYs (Physical layer transceivers). In particular a 10/100-Base-T PHY is targeted as the first short term objective. This device will enable the use of Ethernet in space systems and also provide the starting point for the long term objective of implementing a Gigabit Ethernet PHY for space. To that end, the proposal includes a feasibility study and also contributions to the 1000BASE-T-1 Ethernet standard. To implement the Ethernet PHYs, the consortium has significant analogue (Arquimea) and digital (IHP) design capabilities.
In addition, it has also experience on the upper layers of Ethernet and its use in Space systems (TTTech) and on the design and implementation of Ethernet PHYs and Ethernet standards (Universidad de Nebrija). Finally, the electronic technology and manufacturing capabilities are also covered (ATMEL) as are the space system perspective and testing (Thales Alenia Space Spain).